Semiconductor device and process for producing the same

ABSTRACT

Improvement is affected in uniformizing the thickness of a tape carrier package having a semiconductor chip in which bonding pads are disposed in such a way that the bonding pads are arranged concentratedly on one side of the semiconductor chip.  
     The tape carrier package is such that dummy pads  6   b  are arranged on one side opposite to the other side on which bonding pads (effective pins)  6   a  are arranged concentratedly in the semiconductor chip. Dummy leads  5  are formed on an insulating tape  4  The semiconductor chip is supported with one end portions (inner lead portions  5   a  ) connected to the corresponding bonding pads  6    a  and the inner lead portions  5    a  of the dummy leads  5  connected to the corresponding dummy pads  6   b.

BACKGROUND OF THE INVENTION

[0001] The present invention relates to a semiconductor device and aprocess for producing the same, and more particularly to a technologyeffectively applicable to the manufacture of a semiconductor devicehaving a tape carrier package (called the TCP).

[0002] A TCP, a TSOP (Thin Small Outline Package), a TSOJ (Thin SmallOutline J-Lead Package) and a TQFP (Thin Quad Flat Package) are wellknown as LSI packages with which thin semiconductor devices such as ICcards are mounted. Above all, the TCP formed by mounting a semiconductorchip on a thin tape made of insulating material such as polyimide isusable for realizing an extra-thin LSI package because the thickness ofresin with which the semiconductor chip in encapsulated is reducible.

[0003] A process for making such a TCP comprises the steps of placing asemiconductor chip in a device hole of an insulating tape with leadsformed on one side, bonding one end portion (inner lead portion) of eachlead to a bump electrode which is pre-formed on the major surface(element-forming side) of the semiconductor chip to electrically connectthe lead and the semiconductor chip, encapsulating the semiconductorchip with resin by curing the potting resin applied onto the majorsurface of the semiconductor chip, cutting away the unnecessary portionsof the insulating tape and the leads so that the other end portion(outer lead portion) of each lead can be mounted on a substrate.

[0004] Japanese Patent Laid-Open No. 57248/1991, for example, describessuch a TCP.

SUMMARY OF THE INVENTION

[0005] In the aforementioned TCP, one end portion of each lead isconnected via a bump electrode of Au onto the bonding pad of asemiconductor chip.

[0006] In the case of a semiconductor chip forming a logic LSI having anumber of external connecting terminals (pins), bonding pads with bumpelectrodes to be respectively formed thereon are ordinarily disposedalong the four sides of the chip. In the case of a memory LSI in whichthe number of pins is relatively small, however, bonding pads aredisposed along one side or in the central portion of a chip. A method ofconcentratingly arranging the bonding pads along one side of the chip iscalled a one-side pad arrangement system which is advantageous in thatthe chip size is reducible.

[0007] Nevertheless, there arises the following problem if asemiconductor chip employing the one-side pad arrangement system ispackaged in the TCP.

[0008] When each lead is connected via the bump electrode onto thebonding pad of the semiconductor chip of the one-side pad arrangementsystem, the application of a potting resin onto the semiconductor chipin such a state that the semiconductor chip is supported in the devicehole of an insulating tape only by the leads connected to the respectivebonding pads disposed on one side thereof causes the semiconductor chipto tilt because of the weight of the resin. When the potting resin iscured, the packaging of the tCP cannot be uniformized because part ofthe film thickness is undesirably increased.

[0009] In this case when the potting resin is applied onto thesemiconductor chip in such a state that it is placed on, for example, ahorizontal stage in order to prevent the semiconductor chip from beingtilted (displaced) in this case, the potting resin passed through thegap between the insulating tape and the semiconductor chip tends tostick to the back of the semiconductor chip and the surface of thestage. In consequence, workabilty at the step of encapsulation withresin is extremely lowered.

[0010] An object of the present invention is to provide a technology ofuniformizing the thickness of a TCP in use in packaging a semiconductorchip of a one-side pad arrangement system.

[0011] Another object of the present invention is to provide atechnology of improving the workability of assembling a TCP for use inpackaging a semiconductor chip of a one-side pade arrangement system.

[0012] These and other objects and novel features of the invention maybe readily ascertained by referring to the following description andappended drawings.

[0013] A brief description will be given of the representatives of theinventions disclosed in the present patent application.

[0014] (1) A semiconductor device according to the present inventioncomprising a tape carrier package in which a semiconductor chip is placein the device hole of an insulating tape which is formed with aplurality of leads on the major surface of the semiconductor chip; oneends of the leads are electrically connected onto a plurality of bondingpads which are disposed in an uneven manner in a predetermined area ofthe major surface of the semiconductor chip; and the major surface ofthe semiconductor chip and one ends of the leads at least encapsulatedwith resin, is characterized in the dummy bonding pads in anelectrically floating state are disposed in an area different from thearea where the bonding pads on the major surface of the semiconductorchip are disposed; and one ends protion of dummy leads which are formedon one side of the insulating tape are connected onto the correspondingdummy bonding pads.

[0015] (2) A semiconductor device according to the present invention inwhich the plurality of the bonding pads are disposed along one side ofthe semiconductor chip; and the bonding pads are disposed along theother opposed side of the semiconductor chip.

[0016] (3) A semiconductor device according to the present invention inwhich some dummy leads extending to the portion over the gap between thesemiconductor chip and the insulating tape are disposed in an area alongone side opposite to the one side where the bonding pads of thesemiconductor chip are disposed.

[0017] (4) A semiconductor device according to the present invention inwhich some dummy leads extending to the portion over the gap between thesemiconductor chip and the insulating tape are disposed in areas alongthree sides other than the other side where the bonding pads of thesemiconductor chip are disposed.

[0018] (5) A semiconductor device according to the present invention inwhich the plurality of the bonding pads invention in which the pluralityof the bonding pads are disposed in areas along the three sides of thesemiconductor chip; and the dummy bonding pads are disposed in an areaalong the other side of the semiconductor chip.

[0019] (6) A semiconductor device according to the present invention inwhich the other ends of the leads electrically connected to the bondingpads are extended outside the resin for encapsulating the semiconductorchip so that the other ends of the leads are capable of being packaged.

[0020] (7) A semiconductor device according to the present invention inwhich the other ends of the dummy leads are extended outside the resinfor encapsulating the semiconductor chip so that the other ends of theleads are capable of being packaged.

[0021] (8) A semiconductor device according to the present invention inwhich the tape carrier package is mounted on a printed wiring board.

[0022] (9) A semiconductor device according to the present invention inwhich a plurality of the tape carrier packages are stacked on a printedwiring board.

[0023] (10) A semiconductor device according to the present invention inwhich a protective frame is provided around the insulating tape.

[0024] (11) A semiconductor device according to the present invention inwhich the semiconductor chip is encapsulated with bonding resin.

[0025] (12) A semiconductor device according to the present invention inwhich a flash memory is formed on the major surface of the semiconductorchip.

[0026] (13) A semiconductor device according to the present invention inwhich the plurality of the bonding pads are disposed in thesubstantially central portion of the major surface of the semiconductorchip.

[0027] (14) A semiconductor device according to the present invention inwhich an IC card is loaded with a printed wiring board on which thesemiconductor device is mounted.

[0028] (15) A process for producing a semiconductor device of thepresent invention comprises the steps of:

[0029] (a) preparing an insulating tape having at least a plurality ofleads including dummy leads which are formed on its major surface, and asemiconductor chip having a plurality of bonding pads which are disposedin a uneven manner in a predetermined area on its major surface anddummy bonding pads in an electrically floating state which are disposedin an area different from the area where the bonding pads are disposed;

[0030] (b) placing the semiconductor chip in the device hole of theinsulating tape, electrically connecting one end portions of the leadsto the corresponding bonding pads and connecting one end portions of thedummy leads to the corresponding dummy bonding pads; and

[0031] (c) at least encapsulating the major surface of the semiconductorchip and one end portions of the leads with resin.

[0032] (16) A process for producing a semiconductor device according tothe presend invention in which the semiconductor chip is encapsulated bycuring the potting resin deposited on the major surface of thesemiconductor chip.

BRIEF DESCRIPTION OF THE DRAWINGS

[0033]FIG. 1 is plan view of the semiconductor device of Embodiment 1according to the present invention.

[0034]FIG. 2 is a sectional view taken on line II-II′ of FIG 1.

[0035]FIG. 3 is an enlarged plan view of a semiconductor chip packagedin the semiconductor device of Embodiment 1 according to the presentinvention.

[0036]FIG. 4 is a plan view showing an arrangement of leads in thesemiconductor device of Embodiment 1 according to the present invention

[0037]FIG. 5 is a perspective view showing a process for producing thesemiconductor device of Embodiment 1 according to the present invention.

[0038]FIG. 6 is a prespective view showing a process for producing thesemiconductor device of Embodiment 1 according to the present invention.

[0039]FIG. 7 is a sectional view showing a process for producing thesemiconductor device of Embodiment 1 according to the present invention.

[0040]FIG. 8 is a perspective view showing a process for producing thesemiconductor device of Embodiment 1 according to the present invention.

[0041]FIG. 9 is a sectional view showing a process for producing thesemiconductor device of Embodiment 1 according to the present invention.

[0042]FIG. 10 is a sectional view showing a process for producing thesemiconductor device of Embodiment 1 according to the present invention.

[0043]FIG. 11 is a sectional view showing a process for producing thesemiconductor device of embodiment 1 according to the present invention.

[0044]FIG. 12 is a sectional view showing a process for producing thesemiconductor device of Embodiment 1 according to the present invention.

[0045]FIG. 13 is a sectional view showing a process for producing thesemiconductor device of Embodiment 1 according to the present invention.

[0046]FIG. 14 is a sectional view showing a process for producing thesemiconductor device of Embodiment 1 according to the present invention.

[0047]FIG. 15 is a sectional view showing a process for producing thesemiconductor device of Embodiment 1 according to the present invention.

[0048]FIG. 16 is a sectional view showing a state in which thesemiconductor device is mounted on a printed wiring board of Embodiment1 according to teh present invention.

[0049]FIG. 17 is a sectional view showing a state in which thesemiconductor device is mounted on a printed wiring board of Embodiment1 according to the present invention.

[0050]FIG. 18 is a perspective view of the semiconductor device ofEmbodiment 1 according to the present invention.

[0051]FIG. 19 is a perspective view of the semiconductor device ofEmbodiment 1 according to the present invention.

[0052]FIG. 20 is a plan view of the semiconductor device of Embodiment 1according to the present invention.

[0053]FIG. 21 is a plan view of the semiconductor device of Embodiment 1according to the present invention.

[0054]FIG. 22 is a plan view of the semiconductor device of Embodiment 1according to the present invention.

[0055]FIG. 23 is a plan view of the semiconductor device of Embodiment 1according to the present invention.

[0056]FIG. 24 is a plan view of the semiconductor device of Embodiment 1according to the present invention.

[0057]FIG. 25 is a plan view of the semiconductor device of Embodiment 1according to the present invention.

[0058]FIG. 26 is a plan view of a semiconductor device of Embodiment 2according to the present inveniton.

[0059]FIG. 27 is a sectional view showing a process for producing thesemiconductor device of Embodiment 2 according to the present invention.

[0060]FIG. 28 is a plan view of the semiconductor device of Embodiment 2according to the present invention.

[0061]FIG. 29 is a plan view of an IC card in which the semiconductordevice is loaded according to the present invention.

[0062]FIG. 30 is a plan view of the IC card in which the semiconductordevice is loaded according to the present invention.

[0063]FIG. 31 is a sectional view of the IC card in which thesemiconductor device is loaded according to the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0064] Referring now to the drawings, there will be given a detaileddescription of embodiments of the present invention.

[0065] (Embodiment 1)

[0066]FIG. 1 is a plan view of a semiconductor device (TCP) of thisembodiment according to the present invention, and FIG. 2 is a sectionalview taken on line II-II of FIG. 1. Incidentally, the illustration ofpart of the resin for encapsulating a semiconductor chip is omitted inorder to make the internal structure of the package easily understand.

[0067] A TCP 1A of this embodiment according to the present inventioncomprises a semiconductor chip 2 of single crystal silicon having arectangular plane shape, a potting resin 3 for encapsulating the majorsurface (element forming surface) and side faces of the semiconductorchip 2, and a plurality of leads 5 formed on one side of an insulatingtape 4, one end portion (inner lead portion 5a) of each lead 5 and thesemiconductor chip 2 being electrically connected via a bump electrode 7of Au (gold) formed on the bonding pad 6a on the major surface of thesemiconductor chip 2.

[0068] The potting resin 3 is epoxy resin, for example, and theinsulating tape 4 is made of polyimide, for example. The lead 5 isformed of Cu foil and its surface of the inner lead portion 5 a isplated with Au/Ni, Sn or solder, for example. Further, the other endportion (outer lead portion 5b) of the lead 5 forming the externalconnection terminal of the TCP 1A is in the form of a gull wing and itssurface is also plated with Au/Ni, Sn, solder or the like.

[0069]FIG. 3 is an enlarged plan view of the major surface of theabove-described semiconductor chip 2. As show in FIG. 3, circuitportions 25 are disposed on the major surface of the semiconductor chip2, a memory array and peripheral circuit of, for example, a flash memorybeing formed in the circuit portion. In the peripheral area of the chipadjacent to the circuit portions 25 are a redundancy circuit 26, powersupply wiring 27 for supplying operating voltage to the circuitportions, and a plurality of bonding pads (effective pins) 6aelectrically connected to the circuit portions via the internal wiring28. The circuit portions 25 occupy the most portion of the major surfaceof the semiconductor chip 2 excluding those in which the bonding pads 6a are formed. The bonding pads 6 a including signal pads used forinput-output signals, control signals and the like, and power supplypads connected to the power supply wiring 27. The bonding pads 6 a forsupplying power are provided in both side end portions of the chip, forexample.

[0070] The plurality of the bonding pads 6 a are arranged in a row alongone (the left-hand side of FIG. 3) of the long sides opposite to eachother on the semiconductor chip 2. in other words, a so-called one-sidepad arranging system for locally arranging the bonding pads 6 a alongthe one side

[0071] Bonding pads (dummy pads) 6b in a floating state are arranged inthe respective corner portions of the other long side (the right-handside of FIG. 3) of the semiconductor chip 2. These dummy pads 6b areintended to prevent the insulating tape 4 from positionally shiftingfrom the semiconductor chip 2 during the process of producing the TCP 1Aas will be described later.

[0072]FIG. 4 is a plan view showing an arrangement of leads 5corresponding to the bonding pads (effective pins) 6a and the dummy pad6b . Although the same number of leads 5 is disposed on both two longsides of the semiconductor chip 2, the leads 5 disposed on the long sidewith the dummy pads 6 b are dummy leads which do not function as theexternal connection terminals of the TCP 1A. Of these dummy leads 5,each of the leads 5 near the dummy pads 6b is provided with the innerlead portion 5 a and its leading end is bonded to the dummy pad 6 b andused to support the semiconductor chip 2. The other dummy leads 5 areconstituted of not the inner lead portions 5 a but only the outer leadportions 5 b, respectively. The outer lead portions 5 b of these dummyleads 5 are, as will be described later, used as support members forstably mounting the TCP 1A on the printed wiring board.

[0073] A description will subsequently be given of a process forproducing the TCP 1A of this embodiment according to the presentinvention with reference to FIGS. 5-15.

[0074] In order to manufacture the TCP 1A, the insulating tape 4 shownin FIG. 5 and the semiconductor chip 2 shown in FIG. 6 are prepared.

[0075] The insulating tape 4 is made of polyimide about 50 μ thick andhas a rectangle device hole 8 where the semiconductor chip 2 is placed.In the areas along the two long sides of the device hole 8, and theleads 5 formed by etching thin Cu foil that is bonded onto one side ofthe insulating tape 4 and their inner lead portions 5a are extended intothe device hole 8. The insulating tape 4 is actually a long tape about10 meters long, only part of the tape (equivalent to three TCPs) isshown in FIG. 5.

[0076] The bump electrodes 7 are formed on the bonding pads 6a and dummypads 6 b of the semiconductor chip 2 before the TCP 1A is assembled. Inorder to form the bump electrode 7, a wire bonding tool, for example, isused to bond an Au ball on the bonding pad 6 a and the dummy pad 6b andthen the surface of each Au ball is flattened by means of apressure-bonding tool.

[0077] Subsquently, the semiconductor chip 2 is, as shown in FIG. 7,placed on the stage 11 of an inner lead bonding tool 10 and heated atabout 100°C and after the inner lead portions 5 a are respectively madeopposite to the bump electrodes 7 by positioning the device hole 8 ofthe insulating tape 4 right above the semiconductor chip 2, a bondingtool 12 which is heated to about 500°C is brought into pressure contactwith the inner lead portions 5a for about one second, whereby as shownin FIG. 8, the inner lead portions 5a of all leads 5 are allsimultaneously bonded onto the corresponding bonding pads 6a (or thedummy pads 6b).

[0078] As shown in FIG. 9, further, a dispenser 13 is used to apply thepotting resin 3 diluted with thinner to the major surface of thesemiconductor chip 2. Part of the potting resin 3 applied to the majorsurface of the semiconductor chip 2 is passed through the gap betweenthe insulating tape 4 and the semiconductor chip 2 before beingdeposited on the side faces of the semiconductor chip 2. Thus, the majorsurface and side faces of the semiconductor chip 2 are encapsulated withthe potting resin 3 as shown in FIG. 10 by curing the potting resin 3through heat treatment.

[0079] In case where the semiconductor chip 2 is not provided with thedummy pads 6b when the semiconductor chip 2 is encapsulated with resinthrough the above-described steps according to the one-side padarranging system in which the bonding pads 6a (effective pins) 6a arelocalized on one side, the semiconductor chip 2 is, as shown in FIG. 11,supported by only the inner lead portions 5a of the leads 5 connected tothe respective bonding pads 6a (effective pins). When the potting resin3 is applied to the semiconductor chip 2 like this, the semiconductorchip 2 is caused to tilt because of the weight of the resin as shown inFIG. 12 and as shown in FIG. 13, part of the film becomes undesirablythickened, which results in that it is impossible to uniformize thethickness of the TCP 1A.

[0080] When the potting resin 3 is applied to the semiconductor chip 2placed on the horizontal stage in order to prevent the semiconductorchip 2 from being tilted (displaced) in this case, the potting resin 3passed through the gap between the insulating tape 4 and thesemiconductor chip 2 sticks to the undersurface of the semiconductorchip 2 and the surface of the stage, thus extremely lowering theworkability at the result-encapsulating chip 2 sticks to theundersurface of the semiconductor chip 2 and the surface of the stage,thus extremely lowering the workablility at the result-encapsulatingstep.

[0081] In the case of the TCP 1A of this embodiment according to thepresent invention wherein the dummy pads 6b are disposed on the sideopposite to the side on which the bonding pads 6a (effective pins) aredisposed and the semiconductor chip 2 is supported by the inner leadportions 5a connected to the respective bonding pads 6a (effective pins)and the inner lead portions 5a connected to the respective dummy pads 6bto ensure that the semiconductor chip 2 is prevented from being tilted(displaced) at the resin-encapsulating step, variation in the packagethickness are obviated and the yield of the TCP 1A is made improvablethereby. Thus, the semiconductor chip of the one-side pad arrangingsystem that has been difficult to package in the TCP can easily bepackaged therein, so that a range of semiconductor products employingTCPs in widened.

[0082] Thereafter by cutting/removing unnecessary portions of theinsulating tape 4 and the leads 5, and shaping the outer lead portions5b of the leads 5, the TCP 1A shown in FIGS. 1 and 2 is completed. Theouter lead portions 5b are bent toward the major surface side of thesemiconductor chip 2 as shown in FIG. 2 or toward the undersurface sidethereof as shown in FIG. 15.

[0083] In order to mount the TCP 1A, the outer lead portions 5b of theleads 5 are positioned on the respective electrodes 15 of a printedwiring board 14. Solder is supplied by plating or pasting onto eachelectrode 15 beforehand. Then the outer lead portions 5b and theelectrodes 15 are electrically connected by reflowing the solder in aheating furnace.

[0084] Since all the leads 5 including the dummy leads are provided withthe outer lead portions 5b, the TCP 1A of this embodiment according tothe present invention can be mounted on the printed wiring board 14easily and certainly. With the TCP 1A of this embodiment according tothe present invention, moreover, a stacked module is readilyaccomplishable by changing the bending shapes of the outer lead portions5b for mounting purposed as shown in FIG. 17.

[0085] In addition to the case where one TCP 1A or TCPs in the stackedform are mounted on such a printed wiring board 14 at the finalassembling step, the TCP may be applied to cases, where as shown in FIG.18, a long tape is wound as it is on a reel and conveyed to anotherassembling line in which insulating tapes 4 and leads 5 are cut/removed,if necessary, so as to be mounted on printed wiring boards and where asshown in FIG. 19, the insulating tape 4 is out to a size stimultaneouslywith the provision of a protective plastic frame 16 around theinsulating tape and conveyed to another assembling line in whichunnecessary portions of the insulating tape 4 and the leads 5 as well asthe protective film 16 are cut/removed so that the TCP is mounted on aprinted wiring board.

[0086] In the TCP 1A of this embodiment according to the presentinvention, it is not always necessary that the number of dummy leads 5is equal to the number of leads 5 to be connected to the bonding pads 6a(effective pins) but it may be acceptable that the number of dummy leads5 is equal to the number of bonding pads 6a (two, for example, as shownin FIG. 20. In this case, each dummy lead 5 is provided with the outerlead portions 5b to insure that mounted on the printed wiring board 14is facilitated. Notwithstanding, the thermal resistance of a package ismade reducible by increasing the number of leads 5 because the number ofheat radiating channels from the package to the printed wiring board 14is increased.

[0087] Further, the TCP 1A of this embodiment according to the presentinvention is also applicable to cases where as shown in FIG. 21, thebonding pads (effective pins) 6a are deposed in part of the area on oneside of the semiconductor chip 2, where as shown in FIG. 22, the bondingpads (effective pins) 6a are disposed in a row along the centerline ofthe semiconductor chip 2, where as shown in FIG. 23, the bonding pads(effective pins) 6a are deposed in a row near the intermediate positionbetween the periphery and cenerline of the semiconductor chip 2 andwhere as shown in FIG. 24, some bonding pads (effective pins) 6a arealso disposed on the short sides of the semiconductor chip 2, that is,the bonding pads (effective pins) 6a are disposed on the three sides ofthe semiconductor chip 2.

[0088] Further, the number of dummy pads 6b to be formed on thesemiconductor chip 2 is not limited to two and the positions where theyare arranged are not also limited to the corner portions. As shown inFIG 25, for example, only one dummy pad 6b may be formed near theintermediate position of the side opposite to the side on which bondingpads (effective pins) 6a are disposed, or more than two dummy pads 6bmay be disposed on condition that an area large enough for the dummypads 6b to be disposed is available on the major surface of thesemiconductor chip 2.

[0089] (Emodiment 2)

[0090]FIG. 26 is a plan view of a TCP 1B of this embodiment according tothe present invention. The feature of the TCP 1B is that all dummy leadswhich are formed along side (a long side on the left-hand side of FIG.26) on which bonding pads (effective pins) 6a are disposed have innerlead portions 5a together with outer lead portions 5b, respectively. Ofthese dummy leads 5, the leads 5 near the respective dummy pads 6b (twoleads 5 positioned at the respective ends of a dummy lead array) formedon the major surface of a semiconductor chip 2 are such that thoughtheir inner lead portions 5a are joined to respective dummy pads 6b andused to support the semiconductor chip 2, the inner lead portions 5a ofthe other leads 5 whose leading ends are extended over the semiconductorchip 2 are not used to support the semiconductor chip 2.

[0091] With the TCP 1B thus structed of this embodiment according to thepresent invention, as the inner lead portions 5a are disposed atpredetermined intervales above the gaps between the semiconductor chip 2and an insulating tape 4 in areas along the two opposed long sides ofthe semiconductor chip 2, a potting resin 3 is never allowed topenetrate through the gaps and excessively go around the side face ofthe semiconductor chip 2 even when the potting resin 3 is applied to themajor surface of the semiconductor chip 2 at the step ofresin-encapsulating the semiconductor chip 2 (see FIG. 9).

[0092] In the case where the inner lead portion 5a is provided at bothends of the dummy lead array as in the TCP 1A the preceding embodimentaccording to the present invention (see FIG. 4), the porting resin 3 isallowed to penetrate through the gap in the area along one of the longsides (long right-hand side of FIG. 9) of the semiconductor chip 2 andexcessively go around the side face thereof. Consequently, part of thegap in that area does not become filled with the resin as shown in FIG.27.

[0093] Since the aforcementioned drawback is made avoidable and theworkability at the resin-encapsulating step is made also improvable bythe TCP 1B of this embodiment according to the present invention, it ispossible to improve the throughput and yield of the TCP 1B. The pitch ofthe above-discribed inner lead portions 5a is preferable set not greaterthan half the inner diameter of the nozzle of a dispenser 13 to be usedwhen the potting resin 3 is applied.

[0094] In the TCP 1B shown in FIG. 23 of this embodiment according tothe present invention, dummy inner lead portions of 5a are disposed evenin areas along the other two sides (upper and lower sides) of thesemiconductor chip 2. The inner lead portion 5a provided in this area isformed by branching part of the inner lead portion 5a connected to, forexample, the dummy pad 6b. In this case, the inner lead portions 5a aredisposed in the areas along all sides of the semiconductor chip 2 in theTCP 1B to ensure that the drawback that the gaps between the insulatingtape 4 and the semiconductor chip 2 cannot be filled with the resinbecomes preventable.

[0095] (Embodiment 3)

[0096]FIGS. 29 and 30 are plan views of an IC card mounted with a TCP 1Aof the embodiment 1 of the present invention (or a TCP 1B of theembodiment 1 of the present invention (or a TCP 1B of the embodiment 1of the present invention); and FIG. 30 a sectional view of the IC card.FIG 29(a) is an external view of the front side of the IC card, and FIG.29 (b) shows a mounting portion on the front side thereof. FIG. 30(a) isan external view of the back side of the IC card, and FIG. 30(b) shows amounting portion on the back side thereof.

[0097] The external dimentions of the IC card are, for example,length×width×thickness=36.4 mm×42.8 mm×3.3 mm and has a built-in printedwiring board 20 on which a TCP is mounted. As shown in FIGS. 29(b) and31, the TCP 1A of Embodiment 1 according to the present invention and aTSOP (Thin Small Outline Package) are mounted on the front side of theprinted wiring board 20. The TCP 1A has a two-stage stacked structure asshown in FIG. 17, for example. Moreover, a semiconductor chip forming aDRAM (Dynamic Random Access Memory), for example, is sealed in the TSOP.

[0098] As shown in FIGS. 30(b) and FIG. 31, further, two semiconductorchips 21, 22 of a COB (Chip on Board) system are mounted on the backside of the printed wiring board 20. A microcomputer, for example isformed in one semiconductor chip 21, whereas an ASIC (ApplicationSpecific Intergrated Circuit), for example, a gate array is formed inthe other semiconductor chip 22. The semiconductor chips 21, 22 areseparated from each other by a dam frame 24 which is filled withsilicone resin 23.

[0099] The TCP 1A and the TSOP are both simultaneously mounted on thesurface of the printed wiring board 20 by a solder reflow method.Further, the semiconductor chips 21, 22 are joined with an adhesive tothe back side of the printed wiring board 20 fitted with the dam frame24, electrically connected to the printed wiring board 20 by the wirebonding method and then encapsulated with silicone resin 23.

[0100] Since the TCP 1A which is thinner than any other LSI package ismounted on the semiconductor chip used to form a flash memory of thisembodiment according to the present invention, the memory capacity ofthe IC card can be increased.

[0101] Although a description has been given of the invention made bythe present inventors on the basis of the above-discribed embodimentsthereof, the present invention is not limited to the above-describedembodiments thereof but may needless to say be modified in variousmanners without departing from the gist of the invention.

[0102] In the TCP according to the present invention, part of thebonding pads (effective pins) formed on the semiconductor chip, forexample, GND pads (GND pin) and the like may simultaneously be used asdummy pads.

[0103] The present invention is applicable to not only a TCP in which asemiconductor chip is encapsulated with bonding resin but also a TCPsuch that a semiconductor chip is encapsulated with molding resin. Inother words, according to the present invention, the displacement of asemiconductor chip due to the flow of the molten resin injected into amolding die is preventable.

[0104] The present invention is also applicable to a TCP fabricated bysuch a method for forming bump electrodes on inner lead portions using atransfer method.

[0105] The present invention is further applicable to not only a flashmemory but also a TCP where a semiconductor chip forming a memory LSI, amicrocomputer, a logic LSI or the like is mounted. The present inventionis applicable to a TCP where a semiconductor chip in which at leastbonding pads are disposed so that they are unevenly arranged in aspecific area on the major surface of the semiconductor chip is mounted.

[0106] A brief description will be subsequently given of the effectachievable by exemplary TCPs as disclosed in the present application.

[0107] The thickness of the TCP for the semiconductor chip of theone-side pad arranging system is uniformized, improving the yield of theTCP according to the present invention.

[0108] The workablility of assembling the TCP for the semiconductor chipof the one-side pad arranging system is improvable according to thepresent invention.

[0109] Since the semiconductor chip of the one-side pad arranging systemthat has been difficult to mount in the TCP is readily mounted therein,a range of semiconductor products employing the TCP can be widenedaccording to the present invention.

[0110] The drawback that the gap between the insulating tape and thesemiconductor chip is left unfilled is reliably prevented, improving thereliability and yield of the TCP according to the present invention.

[0111] The memory capacity of the thin semiconductor device such an ICcard can be increased according to the present invention.

What is claimed is:
 1. A semiconductor device comprising: (1) aninsulating tape having a rectangular hole, the hole being defined by apair of opposed long side ends and a pair of opposed short side ends;(2) a rectangular semiconductor chip placed in the hole of theinsulating tape, the semiconductor chip having a major surface on whichan integrated circuit including a plurality of semiconductor elementsand a plurality of bonding pads, a pair of opposed long sides and a pairof opposed short sides, the plurality of the bonding pads including aplurality of first bonding pads which are connected electrically to theintegrated circuit and a plurality of the first bonding pads which areconnected electrically to the integrated circuit, the first bonding padsbeing disposed along one of the pair the opposed long sides, and thesecond bonding pads being disposed along the other one of the pair ofthe opposed long sides; (3) a plurality of leads which are formed on theinsulating tape, the plurality of the leads including a plurality offirst leads crossing one of the pair of long side ends of the insulatingtape and one of the pair of long sides of the semiconductor chip, andextending on the major surface of the semiconductor chip, and aplurality of second leads crossing the other one of the pair of longside ends of the insulating tape and the other pair of long sides of thesemiconductor chip, and extending on the major surface of thesemiconductor, one ends of the plurality of the first leads beingconnected to the corresponding first bonding pads, one ends of theplurality of the second leads being connected to the correspondingsecond bonding pads; and (4) an encapsulating resin for covering themajor surface of the semiconductor chip, and one ends of of theplurality of the first and second leads.
 2. A semicunductor deviceaccording to claim 1 , wherein one ends of the plurality of the firstand second leads are connected via bump electrodes to the correspondingfirst and second bonding pads.
 3. A semiconductor device according toclaim 1 , wherein the plurality of the first leads include signal leadsand power supply leads.
 4. A semiconductor device according to claim 1 ,wherein the leads include a plurality of third leads crossing the otherone of the pair of long side ends of the insulating tape and the otherone of the pair of long sides of the semiconductor chip, and extendingon the major surface of the semiconductor chip, the plurality of thebonding pads.
 5. A semiconductor device comprising: (1) an insulatingtape having a rectangular hole, the hole being defined by a pair ofopposed long side ends and a pair of opposed short side ends; (2) arectangular semiconductor chip placed in the hole of the insulatingtape, the semiconductor chip having a major surface on which anintegrated circuit including a plurality of semiconductor elements and aplurality of bonding pads, a pair of opposed long sides and a pair ofopposed short sides, the plurality of the bonding pads including aplurality of first bonding pads which are connected electrically to theintegrated circuit and a plurality of second bonding pads which are notconnected electrically to the integrated circuits, the first bondingpads beind disposed along one of the pair of the opposed long sides, andthe second bonding pads being disposed along one of the opposed longsides, and the second bonding pads being disposed along the other one ofthe pair of the opposed long sides; (3) a plurality of leads which areformed on the insulating tape, the plurality of the leads including aplurality of first leads crossing of the pair of long side ends of theinsulating tape and one of the pair of long sides of the semiconductorchip, and extending on the major surface of the semiconductor chip, aplurality of second leads crossing the other one of the pair of longside ends of the insulating tape and the other one of the pair of longsides of the semiconductor chip, and extending on the major surface ofthe semiconductor chip, and the plurality of third leads crossing a pairof short side ends of the insulating tape and a pair of short sides ofthe semiconductor chip, and extending on the major surface of thesemiconductor chip, one ends of the plurality of the first leads beingconnected to the corresponding first bonding pads, one ends of theplurality of the second leads being connected to the correspondingsecond bonding pads, and one ends of the plurality of the third leadsbeing not connected to the plurality of the bonding pads; and (4) anencapsulating resin for covering the major surface of the semiconductorchip, and one ends of the plurality of the first, second and thirdleads.
 6. A semiconductor device according to claim 5 , wherein one endsof the plurality of the first and second leads are connected via bumpelectrodes to the corresponding first and second bonding pads.
 7. Asemiconductor device according to claim 5 , wherein the plurality of thefirst leads include signal leads and power supply leads.
 8. Asemiconductor device according to claim 5 , wherein the second and thirdleads are continuous on the insulating tape.
 9. A semiconductor devicecomprising a tape carrier package in which a semiconductor chip isplaced in the device hole of an insulating tape which is formed with aplurality of leads on a major surface of the semiconductor chip, oneends of the leads are electrically connected onto a plurality of bondingpads which are disposed in an uneven manner in a predetermined area ofthe major surface of the semiconductor chip, and the major surface ofthe semiconductor chip and one ends of the leads at least encapsulatedwith resin; characterized in that dummy bonding pads in an electricallyfloating state are disposed in an area in an area different from thearea where the bonding pads on the major surface of the semiconductorchip are disposed, and one ends portion of dummy leads which are formedon one side of the insulating tape are connected to the correspondingdummy bonding pads.
 10. A semiconductor device according to claim 9 ,wherein the plurality of the bonding pads are disposed along one side ofthe semiconductor chip, and the bonding pads are disposed along theother opposed side of the semiconductor chip.
 11. A semiconductor deviceaccording to claim 10 , wherein some dummy leads extending over the gapbetween the semiconductor chip and the insulating tape are disposed inan area along the other side opposite to the one side where the bondingpads of the semiconductor chip are disposed.
 12. A semiconductor deviceaccording to claim 20 , wherein some dummy leads extending over the gapbetween the semiconductor chip and the insulating tape are disposed inareas along three sides other than the other side where the bonding padsof the semiconductor chip are disposed.
 13. A semiconductor deviceaccording to claim 9 , wherein the plurality of the bonding pads aredisposed in areas along the three sides of the semiconductor chip, andthe dummy bonding pads are disposed in an area along the other side ofthe semiconductor chip.
 14. A semiconductor device asccording to claim 9, wherein the other ends of the leads electrically connected to thebonding pads are extended outside the resin for encapsulating thesemiconductor chip so that the other ends of the leads are capable ofbeing encapsulated.
 15. A semiconductor device according to claim 1 ,wherein the other ends of the dummy leads are extended outside the resinencapsulating the semiconductor chip so that the other ends of the leadsare capable of being encapsulated.
 16. A semiconductor according toclaim 15 , wherein the tape carrier package is mounted on a printedwiring board.
 17. A semiconductor device according to claim 15 , thesemiconductor device having a multi-chip module structure comprisingplurality of stacked tape carrier packages which are mounted on aprinted wiring board.
 18. A semiconductor device according to claim 9 ,wherein a protective frame is provided around the insulating tape.
 19. Asemiconductor device according to claim 9 , wherein the semiconductorchip is encapsulated with bonding resin.
 20. A semiconductor deviceaccording to claim 9 , wherein a flash memory is formed on the majorsurface of the semiconductor chip.
 21. A semiconductor device accordingto claim 9 , wherein the plurality of the bonding pads are disposed inthe substantially central portion of the major surface of thesemiconductor chip.
 22. A semiconductor device according to claim 9 ,wherein an IC card is provicded with a printed wiring board on which thesemiconductor device is mounted.
 23. A process for producing asemiconductor device, the process compristing the steps of: (a)preparing an insulating tape having at least a plurality of leadsincluding dummy leads which are formed on a major surface, and asemiconductor chip having a plurality of bonding pads which are disposedin an uneven manner in a predetermined area on the major surface anddummy bonding pads in an electrically floating state which are disposedin an area different from the area where the bonding pads are disposed;(b) placing the semiconductor chip in the device hole of the insulatingtape, electrically connecting one end portions of the leads to thecorresponding bonding pads and connecting one and portions of the dummyleads to the corresponding dummy bonding pads; and (c) at leastencapsulating the major surface of the semiconductor chip and one endportions of the leads with resin.
 24. A process for producing asemiconductor device according to claim 23 , wherein the semiconductorchip is encapsulated by curing potting resin deposited on the majorsurface of the semiconductor chip.